XILINX ATP TRAINING PROGRAM
Oe-Galaxy is Xilinx Authorized Training Providers (ATPs) in Vietnam that are expert instructors specializing in all aspects of FPGA and Embedded design from software to systems and beyond. Xilinx has instructors throughout most of the world. Courses offered leverage training materials specifically developed by Xilinx Engineers and in some instances enhanced further via the specialized knowledge and expertise of Xilinx ATP instructors.Details, Please click here to download the Xilinx Training Course Listing (PDF)
List of the courses offered by Oe-Galaxy (The class date will be informed when enough quantity of student)
| No. | Course | Start date | Location | Duration | Registration |
| 1 | Designing with Verilog (Details) | …../…../2015 | HN/HCM | Register | |
| 2 | Designing with System Verilog (Details) | …../…../2015 | HN/HCM | Register | |
| 3 | Designing with VHDL (Details) | …../…../2015 | HN/HCM | Register | |
| 4 | Advanced VHDL (Details) | …../…../2015 | HN/HCM | Register | |
| 5 |
Essential Tcl Scripting for the Vivado Design Suite (Details) |
…../…../2015 | HN/HCM | Register | |
| 6 | C Language Programming with SDK (Details) | …../…../2015 | HN/HCM | Register | |
| 7 | C-Based HLS Coding for Software Designers (Details) | …../…../2015 | HN/HCM | Register | |
| 8 | Vivado Design Suite Tool Flow (Details) | …../…../2015 | HN/HCM | Register | |
| 9 | Essentials of FPGA Design (Details) | …../…../2015 | HN/HCM | Register | |
| 10 | UltraFast Design Methodology (Details) | …../…../2015 | HN/HCM | Register | |
| 11 |
Vivado Design Suite Static Timing Analysis and Design Constraints (Details) |
…../…../2015 | HN/HCM | Register | |
| 12 |
Advanced Tools and Techniques of Vivado Design Suite (Details) |
…../…../2015 | HN/HCM | Register | |
| 13 |
Introduction to the Zynq All Programmable SoC Architecture (Details) |
…../…../2015 | HN/HCM | Register | |
| 14 | Zynq All Programmable SoC System Architecture(Details) | …../…../2015 | HN/HCM | Register | |
| 15 | How to Design Xilinx Embedded Systems in One Day (Details) | …../…../2015 | HN/HCM | Register | |
| 16 | Embedded Systems Software Design (Details) | …../…../2015 | HN/HCM | Register | |
| 17 |
Advanced Features and Techniques of Embedded Systems Design (Details) |
…../…../2015 | HN/HCM | Register | |
| 18 |
Advanced Features and Techniques of Embedded Systems Software Design (Details) |
…../…../2015 | HN/HCM | Register | |
| 19 | Embedded Design with PetaLinux Tools (Details) | …../…../2015 | HN/HCM | Register | |
| 20 |
How to Design a Xilinx Digital Signal Processing System in One Day (Details) |
…../…../2015 | HN/HCM | Register | |
| 21 |
Essential DSP Implementation Techniques for Xilinx FPGAs (Details) |
…../…../2015 | HN/HCM | Register | |
| 22 | DSP Design Using System Generator (Details) | …../…../2015 | HN/HCM | Register | |
| 23 |
C-Based Design: High-Level Synthesis with Vivado HLS (Details) |
…../…../2015 | HN/HCM | Register | |
| 24 | FPGA Power Optimization (Details) | …../…../2015 | HN/HCM | Register | |
| 25 |
Debugging Techniques Using the Vivado Logic Analyzer (Details) |
…../…../2015 | HN/HCM | Register | |
| 26 | Designing with the Xilinx Analog Mixed Signal Solution (Details) | …../…../2015 | HN/HCM | Register | |
| 27 | Xilinx Partial Reconfiguration Tools and Techniques (Details) | …../…../2015 | HN/HCM |
Register |